Abstract: This article presents a 130-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) architecture that uses a 9-bit capacitive DAC (CDAC) and innovative techniques that ...
Abstract: This paper presents an energy-efficient 12-bit ADC in a 65 nm CMOS process for on-chip waveform digitization on multi-channel front-end ASICs. The converter uses a hybrid architecture that ...
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