Since DAC 2005, there has been extensive discussion about using Statistical Static Timing Analysis (SSTA) to verify current and future generations of designs manufactured at 90 nm or below. Given the ...

The chip industry traditionally has relied on margins to help them mitigate timing problems, but an increasing array of factors are now influencing timing. Can static timing analysis evolve to address ...

In a perfect world, fabrication of silicon ICs would be a perfectly predictable process. Not only would every chip be absolutely identical, but there would be no variations from wafer to wafer, or lot ...

Accurate static timing analysis is one of the most important steps in the development of advanced node semiconductor devices. Performance numbers are included in chip and system specifications from ...