EDN

The power of sequential design optimizations

Energy (or, more specifically, energy consumption) is at the forefront in everyone's mind these days. Whether we are sensitive to the cost of fuel, to the electricity bill or to a dead cell phone ...
Design-Reuse

Sequential equivalence checking for RTL models

In this paper, we examine the need for formal sequential equivalence checking across pairs of RTL models. We present scenarios that call for modifying the sequential behavior of RTL models while ...
Electronic Design

Reduce Power in Chip Designs with Sequential Clock Gating

Clock gating is one of the most frequently used techniques in RTL to reduce dynamic power consumption without affecting the functionality of the design. One method involves inserting gating conditions ...
ascopubs.org

Group sequential design: Selecting appropriate bounds.

Decline in the use of erythropoiesis-stimulating agents: Long-term effects of regulation, reimbursement, and unfavorable data. Effect of a topoisomerase-1 inhibitor (topotecan) on the efficacy of ...
Design-Reuse

Delay Characterization for Sequential Cell

With prior knowledge of delay characterization for combinational standard cells, where the delay values are dependent on the input slew and the output load, one needs to take in account of the ...