SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence (Nasdaq: CDNS) today announced a significant expansion of its portfolio of design IP optimized for Intel 18A and Intel 18A-P technologies and certification ...
Synopsys digital and analog EDA flows are certified and optimized to meet power, performance, and area targets on the Intel 18A process Broad portfolio of high-quality Synopsys IP reduces integration ...
To accelerate time-to-market for these designs, Synopsys is developing the industry's broadest IP portfolio for Interface, Foundation, and SLM (Silicon Lifecycle Management) IP on Intel 18A process ...
Cadence today announced a significant expansion of its portfolio of design IP optimized for Intel 18 A and Intel 18 A-P technologies and certification of Cadence ® digital and analog/custom design ...