The next big leap in CPU design won’t come from adding more cores, chasing smaller nodes, or stacking additional chiplets onto one CPU. That's not to say that things like AMD's 3D V-Cache aren't good, ...

A new technical paper titled “Process-Induced Warpage Behavior in Backside Power Delivery Network Fabrication” was published by researchers at Korea University and Georgia Institute of Technology. “As ...

Backside power delivery reduces routing congestion at the most advanced nodes and offers significant performance improvement options. But it also adds a bunch of new challenges involving via alignment ...

The Intel 18A process is in production and features a critical technology currently exclusive to Intel. Backside power delivery moves power circuits to the back of the chip, unlocking additional ...

(a) Integration schematic of an n-TSV in BSPDN architecture; (b) high-AR n-TSV array configuration; (c) calculated thermal stress mappings in n-TSVs with (i) vertical and (ii) tapered sidewalls.